A baked-in dashboard of public-market picks-and-shovels exposed to accelerated compute, HBM memory, leading-edge foundry, and data-center infrastructure demand.
Accelerators, custom ASICs, networking silicon, and optical I/O remain the highest-beta layer of AI capex.
HBM supply and advanced DRAM packaging are strategic bottlenecks for training clusters and inference fleets.
Leading-edge wafer capacity is the upstream choke point behind GPUs, custom AI ASICs, and advanced packaging.
AI factories need servers, Ethernet fabrics, power trains, and thermal management as much as they need chips.